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ISL97635A
is controlled by the internally generated PWM signal as
shown in Equation 11:
Switching Frequency
An internal clock of 1.2MHz is used for the boost regulator
I LED ( ave ) = I LED × BRT ? 255 × ( 1 – ( V ( PWMO ) – 0.21 ) )
(EQ. 11)
control of the LX pin in default. There are 2 levels of
switching frequencies: 600kHz or 1.2MHz. Each can be
programmed in the Configuration Register 0x08 bit 2. The
Where BRT is the value held in register 0x00 (default setting
0xFF). The PWMO pin is internally driven to 0.21V via a
40k Ω resistor when the PWMI/EN pin is in logic high, any
overdrive circuit will need to be able to drive up to 40μA in
order to overcome this.
The DC-to-PWM controlled PWM frequency is adjusted by a
capacitor at the FPWM pin, which will be described in “PWM
Dimming Frequency Adjustment” on page 13.
For example, if PWMO is applied with a DC voltage ≥ 1.21V,
the output will be zero. On the other hand, if the PWMO is
applied with a DC voltage ≤ 0.21V, the PWM duty cycle will
be at its maximum. If the PWMO pin is applied with a DC
voltage of 0.31V, the PWM duty cycle will be at 90% at
200Hz if C FPWM = 27nF.
PWM Dimming Frequency Adjustment
(Applicable to SMBus controlled PWM, DPST, and
DC-to-PWM Modes)
Except for the external PWM dimming mode where the
frequency follows the external signal’s, the dimming
frequencies of the other modes are set by an external
capacitor C FPWM at the FPWM pin as shown in Equation 12:
default switching frequency is at 1.2MHz.
5V Low Dropout Regulator
A 5.2V LDO regulator is present at the VDC pin to develop
the necessary low voltage supply which is used by the chips
internal control circuitry. Because VDC is an LDO pin, it
requires a bypass capacitor of 1μF or more for the
regulation. For applications with an input voltage ≤ 5.5V, the
VIN and VDC pins can be connected together. The VDC pin
can be used as a coarse reference with few mA sourcing
capability.
In-rush Control and Soft-start
The ISL97635A has separately built-in independent inrush
control and soft-start functions. The inrush control function is
built around the short circuit protection FET, and is only
available in applications which include this device. At
start-up, the fault protection FET is turned on slowly due to a
30μA pull-down current output from the FAULT pin. This
discharges the fault FET's gate-source capacitance, turning
on the FET in a controlled fashion. As this happens, the
output capacitor is charged slowly through the weakly turned
on FET before it becomes fully enhanced. This results in a
low in-rush current. This current can be further reduced by
C FPWM = 5.4 μ ? F PWM
(EQ. 12)
adding a capacitor (in the 1nF to 5nF range) across the
gate-source terminals of the FET.
where F PWM is the desirable PWM dimming frequency.
For example, if FPWM = 200Hz, C FPWM = 5.4μ/200 = 27nF
The PWM dimming frequency can be for example 20kHz but
there are a minimum on and off time requirements such that
the dimming will be in the range of 10% to 99.5%. If the
dimming frequency is below 5kHz, the dimming range can
be 1% to 99.5%.
In the DPST and DC-to-PWM modes, a C PWMO capacitor is
also needed. An internal 40k Ω and an external C PWMO at the
PWMO pin form a low pass network to filter the PWMI to an
averaged DC. As a result, the time constant of the 40k Ω and
C PWMO should be significantly larger than the external PWMI
period, t, such that:
Once the chip detects that the fault protection FET is turned
on hard, it is assumed that inrush is complete. At this point,
the boost regulator will begin to switch and the current in the
inductor will ramp-up. The current in the boost power switch
is monitored and the switching terminated in any cycle
where the current exceeds the current limit. The ISL97635A
includes a soft-start feature where this current limit starts at a
low value (375mA). This is stepped up to the final 3A current
limit in seven further steps of 375mA. These steps will
happen over a 1ms total time, such that after 1ms the final
limit will be reached. This allows the output capacitor to be
charged to the required value at a low current limit and
prevents high input current for systems that have only a low
to medium output current requirement.
40k Ω x C PWMO >t
(EQ. 13)
For systems with no master fault protection FET, the in-rush
current will flow towards C OUT when VIN is applied and it is
For example, if F PWM is 200Hz and external PWMI is 1kHz
or above, a 220nF C PWMO can be chosen that allows the
external PWMI signal to be filtered as an averaged DC. Also,
the F PWM frequency in the DPST mode should be limited
between 100Hz to 2kHz and at least five times smaller than
the external PWMI frequency when DPST mode is used.
13
determined by the ramp rate of VIN and the values of C OUT
and L.
FN6564.2
December 22, 2008
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功能描述:IC LED DRVR WHT/RGB BCKLGT 24QFN RoHS:是 类别:集成电路 (IC) >> PMIC - LED 驱动器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program 标准包装:2,500 系列:- 恒定电流:- 恒定电压:- 拓扑:升压（升压），切换式电容器（充电泵） 输出数:1 内部驱动器:是 类型 - 主要:背光 类型 - 次要:白色 LED 频率:625kHz ~ 875kHz 电源电压:2.7 V ~ 5.3 V 输出电压:5V 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽） 供应商设备封装:10-µMAX 包装:带卷 (TR) 工作温度:-40°C ~ 85°C
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功能描述:IC LED DRVR WHT/RGB BCKLGT 24QFN RoHS:是 类别:集成电路 (IC) >> PMIC - LED 驱动器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS
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制造商:Intersil Corporation 功能描述:
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功能描述:IC LED DRVR WHT/RGB BCKLGT 24QFN RoHS:是 类别:集成电路 (IC) >> PMIC - LED 驱动器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS
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